Datasets:
repo stringclasses 3
values | commit stringlengths 40 40 | date stringdate 2023-04-02 02:30:17-0500 2026-10-18 07:42:16-0500 | pr_number int64 20 61.9k ⌀ | pr_url stringlengths 44 53 ⌀ | title stringlengths 8 263 | message stringlengths 8 8k | path stringlengths 10 155 | language stringclasses 4
values | license stringclasses 4
values | before_code stringlengths 160 118k | after_code stringlengths 340 120k | diff stringlengths 149 51k | lines_added int64 0 729 | lines_removed int64 0 488 | files_in_commit int64 1 10 | models_mentioned listlengths 0 4 | hardware_mentioned listlengths 0 16 | speedup_claims listlengths 0 10 | prompt stringlengths 569 119k | pr_body stringlengths 0 24k | gains stringlengths 2 197k | kernel_speedup float64 0.78 150 ⌀ | e2e_speedup float64 0.76 136 ⌀ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
vllm | b466fbacd2ff68f0ed46a47f2551455ccbe76cef | 2026-10-15T23:22:31-05:00 | 61,895 | https://github.com/vllm-project/vllm/pull/61895 | [ROCm][Perf] Any-shape low-latency MoE router GEMM on MI355 (#61895) | [ROCm][Perf] Any-shape low-latency MoE router GEMM on MI355 (#61895)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: Claude <noreply@anthropic.com> | vllm/model_executor/layers/fused_moe/router/rocm_fp32_router_gemm.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Low-token FP32 router GEMM for gfx950."""
import torch
from vllm.platforms import current_platform
from vllm.platforms.rocm import on_gfx950
from vllm.triton_utils import tl, triton
_MAX_TOKENS = 32
ROCM_FP3... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Low-token router GEMM with FP32 output for gfx950 (FP32 or BF16 weights)."""
import torch
from vllm.platforms import current_platform
from vllm.platforms.rocm import on_gfx950
from vllm.triton_utils import tl... | --- vllm/model_executor/layers/fused_moe/router/rocm_fp32_router_gemm.py
+++ vllm/model_executor/layers/fused_moe/router/rocm_fp32_router_gemm.py
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
-"""Low-token FP32 router GEMM for gfx950."""
+""... | 66 | 39 | 2 | [] | [
"MI355",
"ROCM"
] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/router/rocm_fp32_router_gemm.py).
Goal: [ROCm][Perf] Any-shape low-latency MoE router GEMM on MI355
Target hardware: MI355, ROCM
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrigh... |
## Overview
On MI355 (gfx950), the MoE router GEMM now has a low-latency kernel for **any** router shape (fp32 or bf16 weights, fp32 output, M ≤ 32), matching the CuTeDSL `ll_fp32w` / `ll_bf16` router kernels from #44343 and #50174. Previously only five hard-coded `(hidden_size, num_experts)` shapes had a fast path;... | [{"scope": "e2e", "hardware": "MI355", "model": "ERNIE-4.5-21B-A3B", "shape": "fp32 2560\u00d764", "batch_size": 1, "metric": "decode throughput", "unit": "%", "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.141, "speedup": 1.141}, {"scope": "e2e", "hardware": "MI355", "model": "ERNIE... | 2.585 | 1.043 |
vllm | e711723352670e811b0e904300d771471e28930d | 2026-10-15T16:51:57-05:00 | 58,800 | https://github.com/vllm-project/vllm/pull/58800 | [ROCm] gfx1250 optimizations and model enablement (#58800) | [ROCm] gfx1250 optimizations and model enablement (#58800)
Signed-off-by: jpvillam <juan.villamizar@amd.com>
Signed-off-by: Jaden Mathias <jaden.mathias@amd.com>
Signed-off-by: Juan Villamizar <jpvillam@amd.com>
Signed-off-by: jpvillam <jpvillam@amd.com>
Signed-off-by: Omar Muhammad <omar.muhammad@amd.com>
Signed-off-... | vllm/model_executor/layers/quantization/utils/mxfp4_utils.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Any
import torch
from vllm.logger import init_logger
from vllm.platforms import current_platform
from vllm.triton_utils import tl, triton
from vllm.utils.import_utils import get_triton_kernels... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Any
import torch
from vllm.logger import init_logger
from vllm.platforms import current_platform
from vllm.triton_utils import tl, triton
from vllm.utils.import_utils import get_triton_kernels... | --- vllm/model_executor/layers/quantization/utils/mxfp4_utils.py
+++ vllm/model_executor/layers/quantization/utils/mxfp4_utils.py
@@ -11,6 +11,14 @@
from vllm.utils.torch_utils import direct_register_custom_op, is_torch_equal_or_newer
logger = init_logger(__name__)
+
+
+def should_use_gfx1250_mx_scale_swizzle() -> ... | 28 | 0 | 10 | [] | [
"GFX1250",
"ROCM"
] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/utils/mxfp4_utils.py).
Goal: [ROCm] gfx1250 optimizations and model enablement
Target hardware: GFX1250, ROCM
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright... | ## Purpose
Enables and optimizes gfx1250 (ROCm) for gpt-oss-120b, DeepSeek-R1-0528, DeepSeek-V4-Flash and MiniMax-M3 (MXFP4). Every change is limited to gfx1250; other ROCm and CUDA paths behave as
before.
- **MoE:** new AITER Triton/Gluon W4A4 MXFP4 expert (`aiter_mxfp4_w4a4_moe.py`), with its own backend enum... | [] | null | null |
vllm | 82b9ccaa798eeec73f40ea7766d4044cfeaaff32 | 2026-10-16T03:09:07+08:00 | 61,773 | https://github.com/vllm-project/vllm/pull/61773 | [Perf][MoE] Skip the TRTLLM fp8-block activation-scale transpose copy (#61773) | "[Perf][MoE] Skip the TRTLLM fp8-block activation-scale transpose copy (#61773)\n\nSigned-off-by: Th(...TRUNCATED) | vllm/model_executor/layers/fused_moe/utils.py | triton | Apache-2.0 | "# SPDX-License-Identifier: Apache-2.0\n# SPDX-FileCopyrightText: Copyright contributors to the vLLM(...TRUNCATED) | "# SPDX-License-Identifier: Apache-2.0\n# SPDX-FileCopyrightText: Copyright contributors to the vLLM(...TRUNCATED) | "--- vllm/model_executor/layers/fused_moe/utils.py\n+++ vllm/model_executor/layers/fused_moe/utils.p(...TRUNCATED) | 8 | 2 | 4 | [] | [] | [] | "Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/utils.py).\n\nGoal(...TRUNCATED) | "\n\n## Overview\n\nSkip the per-layer `a1q_scale.t().contiguous()` copy between per-token-group FP8(...TRUNCATED) | "[{\"scope\": \"e2e\", \"hardware\": \"4xGB300\", \"model\": \"Qwen3.8-Flash-Next-FP8\", \"shape\": (...TRUNCATED) | null | 1.0251 |
vllm | c825e1d235896694ca50160286440859ed46d7d3 | 2026-10-15T09:02:53-07:00 | 58,737 | https://github.com/vllm-project/vllm/pull/58737 | "[Perf] Fuse the mamba align block-table gather into one Triton kernel, 7 kernels -> 1, 6x speedup o(...TRUNCATED) | "[Perf] Fuse the mamba align block-table gather into one Triton kernel, 7 kernels -> 1, 6x speedup o(...TRUNCATED) | vllm/v1/attention/backends/utils.py | triton | Apache-2.0 | "# SPDX-License-Identifier: Apache-2.0\n# SPDX-FileCopyrightText: Copyright contributors to the vLLM(...TRUNCATED) | "# SPDX-License-Identifier: Apache-2.0\n# SPDX-FileCopyrightText: Copyright contributors to the vLLM(...TRUNCATED) | "--- vllm/v1/attention/backends/utils.py\n+++ vllm/v1/attention/backends/utils.py\n@@ -18,6 +18,7 @@(...TRUNCATED) | 124 | 12 | 1 | [
"mamba"
] | [] | [
"6x"
] | "Optimize this triton kernel file from vllm (vllm/v1/attention/backends/utils.py).\n\nGoal: [Perf] F(...TRUNCATED) | "> [!IMPORTANT]\n> **Scope: this is a kernel-level microbenchmark, not an end-to-end throughput clai(...TRUNCATED) | "[{\"scope\": \"kernel\", \"hardware\": \"MI355X\", \"model\": null, \"shape\": \"num_reqs=1,spec_bl(...TRUNCATED) | 6.084 | null |
vllm | 7c3f7e5500c85aacb72aab50bd1ce05485b1d73a | 2026-10-14T13:15:58-07:00 | 61,039 | https://github.com/vllm-project/vllm/pull/61039 | [Perf][DSv4.1] Length-aware candidate block selection in the decode indexer (#61039) | "[Perf][DSv4.1] Length-aware candidate block selection in the decode indexer (#61039)\n\nSigned-off-(...TRUNCATED) | vllm/model_executor/layers/sparse_attn_indexer.py | triton | Apache-2.0 | "# SPDX-License-Identifier: Apache-2.0\n# SPDX-FileCopyrightText: Copyright contributors to the vLLM(...TRUNCATED) | "# SPDX-License-Identifier: Apache-2.0\n# SPDX-FileCopyrightText: Copyright contributors to the vLLM(...TRUNCATED) | "--- vllm/model_executor/layers/sparse_attn_indexer.py\n+++ vllm/model_executor/layers/sparse_attn_i(...TRUNCATED) | 14 | 14 | 1 | [
"deepseek"
] | [] | [] | "Optimize this triton kernel file from vllm (vllm/model_executor/layers/sparse_attn_indexer.py).\n\n(...TRUNCATED) | "## Purpose\n\nDeepSeek-V4.1's decode indexer writes its logits into a `[rows, max_model_len]` buffe(...TRUNCATED) | "[{\"scope\": \"kernel\", \"hardware\": \"GB300\", \"model\": \"DeepSeek-V4.1-Flash\", \"shape\": \"(...TRUNCATED) | 10.6092 | 4.9582 |
vllm | 355553ac22dca4080929ea8f88a446f15df1f3ba | 2026-10-15T00:15:51+08:00 | 58,354 | https://github.com/vllm-project/vllm/pull/58354 | [ROCm][Perf] Drop two dead per-step ops from the AITER sparse MLA metadata build (#58354) | "[ROCm][Perf] Drop two dead per-step ops from the AITER sparse MLA metadata build (#58354)\n\nSigned(...TRUNCATED) | vllm/v1/attention/backends/mla/rocm_aiter_mla_sparse.py | triton | Apache-2.0 | "# SPDX-License-Identifier: Apache-2.0\n# SPDX-FileCopyrightText: Copyright contributors to the vLLM(...TRUNCATED) | "# SPDX-License-Identifier: Apache-2.0\n# SPDX-FileCopyrightText: Copyright contributors to the vLLM(...TRUNCATED) | "--- vllm/v1/attention/backends/mla/rocm_aiter_mla_sparse.py\n+++ vllm/v1/attention/backends/mla/roc(...TRUNCATED) | 5 | 6 | 1 | [] | [
"ROCM"
] | [] | "Optimize this triton kernel file from vllm (vllm/v1/attention/backends/mla/rocm_aiter_mla_sparse.py(...TRUNCATED) | "## Purpose\n\n`ROCMAiterMLASparseMetadataBuilder.build()` runs once per KV-cache group per schedule(...TRUNCATED) | "[{\"scope\": \"kernel\", \"hardware\": \"MI355X\", \"model\": \"GLM-5.3\", \"shape\": null, \"batch(...TRUNCATED) | 1.128 | 1.0054 |
vllm | badfcdbf919532624b2296eeacb85c6dd9fe2e58 | 2026-10-14T14:49:46+08:00 | 60,050 | https://github.com/vllm-project/vllm/pull/60050 | [Perf][GDN] Internal prefill checkpoints for the FlashInfer GDN prefill backend (#60050) | "[Perf][GDN] Internal prefill checkpoints for the FlashInfer GDN prefill backend (#60050)\n\nSigned-(...TRUNCATED) | vllm/model_executor/layers/mamba/checkpoint.py | triton | Apache-2.0 | "# SPDX-License-Identifier: Apache-2.0\n# SPDX-FileCopyrightText: Copyright contributors to the vLLM(...TRUNCATED) | "# SPDX-License-Identifier: Apache-2.0\n# SPDX-FileCopyrightText: Copyright contributors to the vLLM(...TRUNCATED) | "--- vllm/model_executor/layers/mamba/checkpoint.py\n+++ vllm/model_executor/layers/mamba/checkpoint(...TRUNCATED) | 127 | 11 | 5 | [
"mamba"
] | [] | [] | "Optimize this triton kernel file from vllm (vllm/model_executor/layers/mamba/checkpoint.py).\n\nGoa(...TRUNCATED) | "<!-- markdownlint-disable -->\n\n## Overview\n\nInternal prefill checkpoints (RFC #52959) for Qwen (...TRUNCATED) | "[{\"scope\": \"e2e\", \"hardware\": \"GB200\", \"model\": \"Qwen3.5-35B-A3B\", \"shape\": \"N=8000\(...TRUNCATED) | null | 1.0089 |
vllm | 2308b6f00be1b65c0b9159e922c529ead5299603 | 2026-10-14T10:48:05+08:00 | 58,897 | https://github.com/vllm-project/vllm/pull/58897 | [Perf][MoE] Cheaper triton_kernels 3.8 routing build in the OAI Triton MoE (#58897) | "[Perf][MoE] Cheaper triton_kernels 3.8 routing build in the OAI Triton MoE (#58897)\n\nSigned-off-b(...TRUNCATED) | vllm/model_executor/layers/fused_moe/experts/gpt_oss_triton_kernels_moe.py | triton | Apache-2.0 | "# SPDX-License-Identifier: Apache-2.0\n# SPDX-FileCopyrightText: Copyright contributors to the vLLM(...TRUNCATED) | "# SPDX-License-Identifier: Apache-2.0\n# SPDX-FileCopyrightText: Copyright contributors to the vLLM(...TRUNCATED) | "--- vllm/model_executor/layers/fused_moe/experts/gpt_oss_triton_kernels_moe.py\n+++ vllm/model_exec(...TRUNCATED) | 34 | 17 | 1 | [] | [] | [] | "Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/experts/gpt_oss_tr(...TRUNCATED) | "## Purpose\n\nOn triton_kernels 3.8, which every ROCm build ships since #50605, the MoE routing met(...TRUNCATED) | "[{\"scope\": \"kernel\", \"hardware\": \"MI355X\", \"model\": \"DeepSeek-V4-Flash\", \"shape\": nul(...TRUNCATED) | 2.8875 | 1.022 |
vllm | c19c263ac8ea3fd6e1d2d689f0e4e725855d89cf | 2026-10-13T16:06:41-04:00 | 60,927 | https://github.com/vllm-project/vllm/pull/60927 | "[GLM 5.3 Perf] Handle two elements at the same time for per token group quant, 2.8% E2E ITL improve(...TRUNCATED) | "[GLM 5.3 Perf] Handle two elements at the same time for per token group quant, 2.8% E2E ITL improve(...TRUNCATED) | csrc/quantization/w8a8/fp8/per_token_group_quant.cu | cuda | Apache-2.0 | "#include <torch/csrc/stable/tensor.h>\n#include <torch/csrc/stable/ops.h>\n#include <torch/headeron(...TRUNCATED) | "#include <torch/csrc/stable/tensor.h>\n#include <torch/csrc/stable/ops.h>\n#include <torch/headeron(...TRUNCATED) | "--- csrc/quantization/w8a8/fp8/per_token_group_quant.cu\n+++ csrc/quantization/w8a8/fp8/per_token_g(...TRUNCATED) | 55 | 26 | 1 | [
"glm"
] | [] | [] | "Optimize this cuda kernel file from vllm (csrc/quantization/w8a8/fp8/per_token_group_quant.cu).\n\n(...TRUNCATED) | "## Overview\n\nHandle two elements at the same time for per token group quant\n\nUsing specific ins(...TRUNCATED) | [] | null | null |
vllm | e83222396f6c9ceb72f80c0d82782071bbd8317c | 2026-10-13T19:21:30+02:00 | 57,199 | https://github.com/vllm-project/vllm/pull/57199 | [ROCm][Perf] W4A16: speed up skinny GEMM decode, including speculative batches (#57199) | "[ROCm][Perf] W4A16: speed up skinny GEMM decode, including speculative batches (#57199)\n\nSigned-o(...TRUNCATED) | csrc/rocm/skinny_gemms_int4.cu | cuda | Apache-2.0 | "#include <torch/all.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n\n#inc(...TRUNCATED) | "#include <torch/all.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n\n#inc(...TRUNCATED) | "--- csrc/rocm/skinny_gemms_int4.cu\n+++ csrc/rocm/skinny_gemms_int4.cu\n@@ -8,6 +8,7 @@\n \n #inclu(...TRUNCATED) | 446 | 98 | 1 | [] | [
"ROCM"
] | [] | "Optimize this cuda kernel file from vllm (csrc/rocm/skinny_gemms_int4.cu).\n\nGoal: [ROCm][Perf] W4(...TRUNCATED) | "## Summary\n\nTunes the W4A16 skinny GEMM decode path on gfx115x, and stops routing deep-K decode s(...TRUNCATED) | "[{\"scope\": \"kernel\", \"hardware\": \"gfx1151\", \"model\": null, \"shape\": \"M=43008,K=5376\",(...TRUNCATED) | 1.1968 | 1.1168 |
Kernel-Opt RL
Real-world GPU kernel optimization data mined from production LLM inference engines (vLLM, SGLang, FlashInfer). It's built for RL: given a base kernel and a concrete deployment (model shape, GPU, dtype, batch size), choose the optimization.
Inference engines ship one generic kernel and specialize it per model and per GPU. Most of that
specialization is not new code. It is autotuned launch parameters checked in as JSON
(E=8,N=14336,device_name=NVIDIA_H100_80GB_HBM3.json), plus a stream of perf commits that rewrite
kernels for specific models and hardware. This dataset turns both into RL tasks, with the benchmark
gains reported in each PR description extracted as structured measurements.
Subsets
tuned_configs: kernel + deployment → best launch config
| rows | 19,287 (17,561 train / 1,726 test) |
| tuned config files | 1,138 |
| GPUs | 48 (NVIDIA A100 → B300/GB300, AMD MI300X/MI325X/MI355X, Intel Arc, …) |
| kernels | fused_moe_kernel (vLLM + SGLang), fused_moe_kernel_gptq_awq, _w8a8_triton_block_scaled_mm, _w8a8_block_fp8_matmul, _w8a8_block_int8_matmul, _selective_scan_update_kernel |
| dtypes | bf16/fp16, fp8_w8a8 (per-tensor + 128×128 block), int8_w8a8, int8_w8a16, int4_w4a16 |
| M (tokens) | 1 … 262,144 |
| documented gains | 148 tuning PRs traced, 66 with benchmark tables; speedup_vs_default on 399 rows from 46 config files (median 1.30×, p10 1.03×, p90 1.98×) |
One row is one (config file, batch size M) entry. prompt contains the Triton kernel source, the
hardware, the problem shape and the MoE models whose shape matches under TP/EP (candidate_models,
resolved against 32 MoE model configs on the Hub). It asks for a JSON config. best_config is the
autotuned answer.
Gain fields: config_pr_url is the newest PR that added or changed the config file. config_pr_gains
holds all measurements extracted from that PR. speedup_vs_default is the documented speedup of the
tuned config over vLLM/SGLang's default heuristic at this exact M. It is set only when the attribution
is unambiguous: the GPU and shape match, and multiple matching rows agree within 5%.
Split: grouped by config filename (hash), so a given (shape, GPU, dtype) never appears in both train and test, whatever the repo, Triton version or M.
kernel_commits: optimize a kernel file the way the real perf PR did
| rows | 1,517 file-level tasks (1,365 train / 152 test) from 850 PRs |
| languages | CUDA (.cu/.cuh), C++, Triton, CuTe DSL |
| date range | 2023-04 → 2026-10 |
| documented gains | 529 PRs with benchmark numbers → 913 rows; kernel_speedup on 596 rows (median 1.33×, p10 1.02×, p90 4.25×), e2e_speedup on 556 rows |
Selected from non-merge commits that touch kernel directories and carry a performance signal in the
title ([Perf], optimize, speedup, faster, tune, throughput, latency, …), excluding build, CI, docs,
tests and reverts. Only modified kernel files are kept: ≤10 per commit, ≤120 KB per file, ≤800 changed
lines.
prompt gives the goal (the PR title, which plays the role of the issue in SWE-RL), the target hardware
and models, and the full before_code. It asks for SEARCH/REPLACE edits. The PR body is withheld
from the prompt because it usually describes the fix. The reference answer is after_code / diff.
Prompt lengths: median 21K chars (6K tokens), p90 ~74K chars. Filter on len(prompt) for short-context
RL.
Other fields: models_mentioned, hardware_mentioned, speedup_claims (regex over the commit
message), pr_body, gains (structured measurements from the PR), kernel_speedup / e2e_speedup
(median documented speedup at kernel and end-to-end scope), license.
Split: temporal. The newest ~10% of rows are test (2026-10-18 onward), the code least likely to be in a model's pretraining data.
gains / config_pr_gains format
A JSON list of measurements extracted from the PR description:
{scope: "kernel"|"e2e", hardware, model, shape, batch_size, metric, unit, higher_is_better, baseline, optimized, stated_speedup, speedup}. speedup is computed in code from baseline/optimized and
normalized so that > 1 means the PR is better. When a PR states only a ratio, stated_speedup is used.
Extraction was done by Qwen3-235B-A22B-Instruct-2507, with gpt-oss-120b as a fallback for very long
tables, using an extract-only prompt (no computed numbers). Audit: in 98.8% of extracted
baseline/optimized pairs, both values appear verbatim in the PR text. The remainder were mostly averages
of repeated runs. Extraction failed for 5 PRs (malformed model output), which have empty gains.
Using it for RL
Rewards live in code/reward.py:
tuned_configs:config_rewardis deliberately a stub, because the partial-credit scheme is a design choice. Compare the parsed JSON config tobest_configas an offline proxy (exact match is sparse, so use partial credit or log-distance on the power-of-two tile sizes).speedup_vs_defaulttells you how much a config actually matters for that row and can weight the reward. On hardware, launchkernel_sourcewith the predicted config and rewardt_best / t_pred. The tuned config is only the best within the tuner's search space, so it can be beaten.kernel_commits:patch_reward(completion, before_code, after_code)follows SWE-RL. It returns −1 if the edits are malformed or don't apply, and otherwise thedifflibsimilarity between the changed lines and the real commit's. Validated on this data: the oracle edit scores 1.0 on 98.7% of rows and ≥ 0.95 on all but one. For an execution reward, run through an environment such as KernelGYM. Watch for reward hacking (timer exploits, cached outputs; see the CUDA-L1 notes).
from datasets import load_dataset
ds = load_dataset("guychuk/kernel-opt-rl", "kernel_commits", split="train")
ds = ds.filter(lambda r: len(r["prompt"]) < 32_000 and r["kernel_speedup"]) # short, with documented gains
Both subsets have a plain-string prompt column. TRL's GRPOTrainer forwards the other columns
(best_config, before_code, after_code, …) to reward functions as keyword arguments.
Limitations
- Tuned configs record only the winner, not the full latency table, so offline config rewards are a
proxy.
speedup_vs_defaultcovers only rows whose PR documented that exact M. candidate_modelscomes from shape matching (E == experts,N == intermediate / TP, orE == experts / EP). Shapes are shared across models, e.g. DeepSeek-V3, Kimi-K2 and MiMo-V2-Flash.- PR gains are self-reported by the authors, on their hardware and benchmark setup, and are not reproduced.
- Snapshots are from each repo's HEAD at build time (see
commit). Rebuild for fresher data.
Licensing
All code comes from vLLM, SGLang and FlashInfer (all Apache-2.0). Some vendored files carry their own
licenses. Each row has a license field taken from the file header (Apache-2.0: 1,481 commit rows and all
config rows; BSD-3-Clause / BSD: 35; MIT: 1). Files under non-open-source licenses (the NVIDIA TensorRT
Source Code License Agreement and NVIDIA proprietary headers) are excluded. License and copyright
headers in the code are kept verbatim. The upstream LICENSE and NOTICE files are in
licenses/, as Apache-2.0 §4 requires. The compilation itself is released under
Apache-2.0. PR descriptions are quoted from public GitHub PRs and linked via pr_url.
Related datasets
KernelBench (eval; keep held out), KernelBook (PyTorch→Triton pairs), Nemotron-SFT-CUDA-v1 (CUDA SFT with tests), CUDA-L1 (RL-optimized KernelBench solutions per GPU).
Reproduce
The build code is in code/. uv run build.py --push <repo_id> clones the three repos as blobless clones, mines configs and commits,
fetches PR descriptions with gh, extracts gains via HF Inference Providers (cached), and pushes.
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